1. Field of the Invention
This invention relates to instruction issue and more particularly relates to discontiguous multiple issue of instructions.
2. Description of the Related Art
Microprocessors typically function by executing a series of instructions organized in a program. Microprocessors are referred to hereinafter as processors. A processor may execute an instruction over one or more clock cycles. To increase the execution of instructions, some processors concurrently execute one or more instructions.
For example, a first and second instruction may be executed concurrently if the second instruction is not dependent on the first instruction. Unfortunately, the instructions of the program may be ordered to be executed sequentially. As a result, some sequential instruction groups may be difficult to execute concurrently. As a result, modern processors often execute instructions out of order to increase throughput, concurrently processing unrelated instructions.
In addition, modern processors may be configured to execute more than one instruction per clock cycle. Thus a first instruction may be executed while a later third instruction is executed out of order, followed by the execution of a second instruction.
Unfortunately, it is more difficult to issue multiple instructions. Issuing and executing multiple instructions per cycle requires significant hardware support to track and resolve dependencies, with the hardware requirements typically increasing with the square of the number of execution units.